CMOS-based image sensor arrays typically comprise a linear array of photosites which raster scan an image bearing document and convert the microscopic image areas viewed by each photosite to image signal charges. Following an integration period, the image signal charges are amplified and transferred to a common output line or bus through successively actuated multiplexing transistors. In the scanning process, bias and reset charges are applied in a predetermined time sequence during each scan cycle. Where the array employs two stage transfer circuits for transferring the image signal charges from the photosites, the bias charge is applied to each photosite through a charge injection transistor and the first transistor in the two stage transfer circuit. The reset charge is applied through a reset charge injection transistor and the second transistor of the two stage transfer circuit.